1. Technical Field
Embodiments relate to capacitor, a semiconductor device including the same, and associated methods.
2. Description of the Related Art
Semiconductor devices may be manufactured by forming circuit patterns on a semiconductor substrate, e.g., a silicon wafer. For example, an embedded dynamic random access memory (eDRAM) may include a cell region and a logic region. A plurality of memory cells may be formed in the cell region, and logic circuits may be formed in the logic region. The logic circuits may include a plurality of transistors and a plurality of capacitors.
Each of the capacitors may include a lower electrode, a dielectric layer pattern, and an upper electrode. Unit processes such as a deposition process for forming a layer, a photolithography process, an etching process, a planarization process for patterning the layer, etc., may be performed repeatedly to form the capacitors.
However, when processes for the memory cells in the cell region and processes for the logic circuits in the logic region are performed separately, costs for manufacturing the semiconductor devices may be increased. Accordingly, it is desirable to reduce the number of the unit processes for forming the memory cells and the logic circuits.
In addition, in order to improve the performance of semiconductor devices, it is desirable to increase the capacitances of capacitors. For example, a dielectric layer pattern including a high dielectric material may be used to form capacitors. Also, electrodes and a dielectric layer pattern having an increased effective surface area therebetween may be used to form capacitors.